Recently Till Harbaum added a PS2 converter for the MiST. Since the IO is handled by the ARM processor the exchange with the FPGA goes via SPI. This makes it difficult to use existing HDL sources because often a PS2 interface is assumed. Grant’s multi computer tutorial expects a PS2 keyboard as well. With the new converter I gave the project another go.
Putting the sources together and connecting the required pins was easy but it didn’t worked out. I still wasn’t able to type something on the screen. I had a little mail exchange with Till and asked him if he sees some obivious error done by me.
He replied pretty quickly and found the problem. I drove the PS2 converter with the CPU clock and that was too much. I read in the converter sources that it needs a clock between 10-16 … kHz but I blindly ignored the kHz and used the cpu clock which was around 12 MHz. 🙂
After I added a simple frequency divider which I found here and used 12 kHz for the PS2 converter clock the keyboard worked and I was able to type in some simple commands.
Below is a crappy image taken with my mobile:
I’m still a noob when it comes to understanding the FPGA stuff. But I’m eager to learn an recently I’ve discovered the nice page of Grant Searle.
He takes the time to explain on how to build your own custom computer.
I thought it would be a nice challenge to get that running on my MiST. I’ve altered all sources of the module altsyncram to fit to the Cyclone III used in the MiST. Since the MiST is big enough I’ve used the following options without using sram:
CPU: Z80
ROM: Z80_BASIC_ROM
Program RAM: InternalRam4K
Interfaces: SBCTextDisplayRGB
Chip select: 4K internal RAM
I’ve connected the internal 27MHz clock of the MiST directly to the clock of this example. I knew that the example board is clocked with 50MHz but I wanted to see if it makes any difference. I’m still experimenting with this why not try it? 😉
I found in the minimig sources that the MiST uses there only two RGB output pins and that the pins 0-1 and 4-5 are unused. So I tried the same with the multicomp example:
1
2
3
4
5
6
7
8
9
--RGB video signals
hSync=>VGA_HS
vSync=>VGA_VS
videoR0=>VGA_R(2)
videoR1=>VGA_R(3)
videoG0=>VGA_G(2)
videoG1=>VGA_G(3)
videoB0=>VGA_B(2)
videoB1=>VGA_B(3)
Now the exciting part when starting the example the first time on the MiST. Unfortunately not much happened. The monitor didn’t show anything and went into sleep mode soon. So what is wrong?
I supposed that the monitor was driven by the wrong clock. Since the example board was driven by 50MHz it could be that the rest of the code is based on that.
I’ve used the Altera Megafunctions to create a module altpll with 27Mhz as input clock and 50MHz as output (c0). To enable that for the multicomp I’ve added the following code before the cpu entity:
1
2
3
4
5
6
pll_27_inst:entity work.pllclk_ez
port map
(
inclk0=>CLOCK_27(0),
c0=>clk--master clock
);
Heureka! The boot prompt was visible and the cursor flashes so retro. 🙂
Still the screen was a little off and IIRC the monitor showed a refresh rate of 59MHz. In another attemped I changed the clk0_multiply_by of the alltpll from 50 to 60 and voila the screen looked really nice.
The next step will be to somehow connect the keyboard via SPI. The MiST uses SPI to talk to its IO ports like joysticks, keyboards, usb, etc. The example uses PS2 and I have to find a way to bring that together. For a regular vhdl developer this will be an easy task but for me it will be an adventure. 🙂
The current source code of this project can be found in my github repo.
Finally I found some time to do something with the MiST. Since I need something for starters I had a look at the PACE framework. It has build files for a lot of arcade cores and several targets like the MiST or the de1/2 boards. I just tried using an existing MiST Quartus II project file (pacman) and adapt it for frogger. The same goes for the project_pkg.vhd file. To generate the right clocks for the MiST I’ve used the existing pllclk_ez.* files.
After successful compilation of the core I was surprised that the core worked without problems on the MiST. Okay the gameplay was horizontal and it had no sound but from what I understand this is the current status for all frogger cores and nothing I did wrong 🙂
Later on I found the interesting web log of retroramblings.net and there an article about building a core from the pace archive. It gave me a little bit more insight about what I have done 😉
With the help of the article I’ve created new pllclk_ez.* files and adapted the project_pkg.vhd file accordingly. Voila …
Update:
Does anyone have the pace framework documentation? I really would like to learn more about it but you can only download it from their forums as registered member. I’ve tried to contact them via the forum but no contact yet.
Compiling the Atari ST core for the MIST is pretty straight forward like described here. For the minimig core some prerequisites are needed which I’ll describe below.
The amiga_boot.v file is missing and needs to be compiled before using the Altera Web Edition to compile the core.
I was lazy and took the mingw build environment used for XBMC (https://github.com/xbmc/xbmc/tree/master/project/BuildDependencies). I used it to compile vasm which is needed to compile amiga_boot.
I copied the binary vasm68k_mot.exe to a bin directory in the mingw env. Since the xxd binary was missing as well I download the msys-vim package from sourceforge and installed it in the mingw env as well.
When I got some time I’ll create a stripped down mingw/msys env with the binaries needed to compile the firmware and amiga_boot.
Once done we need python for windows in path. With some smaller changes to the python scripts and the makefile I was able to compile the amiga_boot files. Once finished I’ll submit the changes to the MIST main repo.
Meanwhile you can use the files from here: https://github.com/wsoltys/mist-board/tree/master/cores/minimig/fw/amiga_boot/bin
Copy those files to the same directory structure of the MIST main repo clone and open minimig_mist.qpf with the Altera Web Edition. In the Web Edition you need to enable talkback in order to use the Signaltap which is needed to compile the minimig core.
Go to Options
Internet Connectivity
Talkback options and enable them
Now you can start the compilation and after some minutes its done 🙂
